1 ;-------------------------------------------------------- 2 ; File Created by SDCC : FreeWare ANSI-C Compiler 3 ; Version 2.5.0 #1020 (Sep 22 2005) 4 ; This file generated Thu Oct 27 21:43:46 2005 5 ;-------------------------------------------------------- 6 .module timer 7 .optsdcc -mmcs51 --model-small 8 9 ;-------------------------------------------------------- 10 ; Public variables in this module 11 ;-------------------------------------------------------- 12 .globl _timer0 13 .globl _timer0_init 14 .globl _timer0_set_period 15 .globl _timer0_set_counter 16 .globl _EIPX6 17 .globl _EIPX5 18 .globl _EIPX4 19 .globl _PI2C 20 .globl _PUSB 21 .globl _EIEX6 22 .globl _EIEX5 23 .globl _EIEX4 24 .globl _EI2C 25 .globl _EUSB 26 .globl _SMOD1 27 .globl _ERESI 28 .globl _RESI 29 .globl _INT6 30 .globl _CY 31 .globl _AC 32 .globl _F0 33 .globl _RS1 34 .globl _RS0 35 .globl _OV 36 .globl _FL 37 .globl _P 38 .globl _TF2 39 .globl _EXF2 40 .globl _RCLK 41 .globl _TCLK 42 .globl _EXEN2 43 .globl _TR2 44 .globl _C_T2 45 .globl _CP_RL2 46 .globl _SM01 47 .globl _SM11 48 .globl _SM21 49 .globl _REN1 50 .globl _TB81 51 .globl _RB81 52 .globl _TI1 53 .globl _RI1 54 .globl _PS1 55 .globl _PT2 56 .globl _PS0 57 .globl _PT1 58 .globl _PX1 59 .globl _PT0 60 .globl _PX0 61 .globl _EA 62 .globl _ES1 63 .globl _ET2 64 .globl _ES0 65 .globl _ET1 66 .globl _EX1 67 .globl _ET0 68 .globl _EX0 69 .globl _SM0 70 .globl _SM1 71 .globl _SM2 72 .globl _REN 73 .globl _TB8 74 .globl _RB8 75 .globl _TI 76 .globl _RI 77 .globl _TF1 78 .globl _TR1 79 .globl _TF0 80 .globl _TR0 81 .globl _IE1 82 .globl _IT1 83 .globl _IE0 84 .globl _IT0 85 .globl _SEL 86 .globl _EIP 87 .globl _B 88 .globl _EIE 89 .globl _ACC 90 .globl _EICON 91 .globl _PSW 92 .globl _TH2 93 .globl _TL2 94 .globl _RCAP2H 95 .globl _RCAP2L 96 .globl _T2CON 97 .globl _SBUF1 98 .globl _SCON1 99 .globl _IP 100 .globl _IE 101 .globl _SBUF0 102 .globl _SCON0 103 .globl _MPAGE 104 .globl _EXIF 105 .globl _SPC_FNC 106 .globl _CKCON 107 .globl _TH1 108 .globl _TH0 109 .globl _TL1 110 .globl _TL0 111 .globl _TMOD 112 .globl _TCON 113 .globl _PCON 114 .globl _DPS 115 .globl _DPH1 116 .globl _DPL1 117 .globl _DPH 118 .globl _DPL 119 .globl _SP 120 ;-------------------------------------------------------- 121 ; special function registers 122 ;-------------------------------------------------------- 123 .area RSEG (DATA) 0081 124 _SP = 0x0081 0082 125 _DPL = 0x0082 0083 126 _DPH = 0x0083 0084 127 _DPL1 = 0x0084 0085 128 _DPH1 = 0x0085 0086 129 _DPS = 0x0086 0087 130 _PCON = 0x0087 0088 131 _TCON = 0x0088 0089 132 _TMOD = 0x0089 008A 133 _TL0 = 0x008a 008B 134 _TL1 = 0x008b 008C 135 _TH0 = 0x008c 008D 136 _TH1 = 0x008d 008E 137 _CKCON = 0x008e 008F 138 _SPC_FNC = 0x008f 0091 139 _EXIF = 0x0091 0092 140 _MPAGE = 0x0092 0098 141 _SCON0 = 0x0098 0099 142 _SBUF0 = 0x0099 00A8 143 _IE = 0x00a8 00B8 144 _IP = 0x00b8 00C0 145 _SCON1 = 0x00c0 00C1 146 _SBUF1 = 0x00c1 00C8 147 _T2CON = 0x00c8 00CA 148 _RCAP2L = 0x00ca 00CB 149 _RCAP2H = 0x00cb 00CC 150 _TL2 = 0x00cc 00CD 151 _TH2 = 0x00cd 00D0 152 _PSW = 0x00d0 00D8 153 _EICON = 0x00d8 00E0 154 _ACC = 0x00e0 00E8 155 _EIE = 0x00e8 00F0 156 _B = 0x00f0 00F8 157 _EIP = 0x00f8 158 ;-------------------------------------------------------- 159 ; special function bits 160 ;-------------------------------------------------------- 161 .area RSEG (DATA) 0086 162 _SEL = 0x0086 0088 163 _IT0 = 0x0088 0089 164 _IE0 = 0x0089 008A 165 _IT1 = 0x008a 008B 166 _IE1 = 0x008b 008C 167 _TR0 = 0x008c 008D 168 _TF0 = 0x008d 008E 169 _TR1 = 0x008e 008F 170 _TF1 = 0x008f 0098 171 _RI = 0x0098 0099 172 _TI = 0x0099 009A 173 _RB8 = 0x009a 009B 174 _TB8 = 0x009b 009C 175 _REN = 0x009c 009D 176 _SM2 = 0x009d 009E 177 _SM1 = 0x009e 009F 178 _SM0 = 0x009f 00A8 179 _EX0 = 0x00a8 00A9 180 _ET0 = 0x00a9 00AA 181 _EX1 = 0x00aa 00AB 182 _ET1 = 0x00ab 00AC 183 _ES0 = 0x00ac 00AD 184 _ET2 = 0x00ad 00AE 185 _ES1 = 0x00ae 00AF 186 _EA = 0x00af 00B8 187 _PX0 = 0x00b8 00B9 188 _PT0 = 0x00b9 00BA 189 _PX1 = 0x00ba 00BB 190 _PT1 = 0x00bb 00BC 191 _PS0 = 0x00bc 00BD 192 _PT2 = 0x00bd 00BE 193 _PS1 = 0x00be 00C0 194 _RI1 = 0x00c0 00C1 195 _TI1 = 0x00c1 00C2 196 _RB81 = 0x00c2 00C3 197 _TB81 = 0x00c3 00C4 198 _REN1 = 0x00c4 00C5 199 _SM21 = 0x00c5 00C6 200 _SM11 = 0x00c6 00C7 201 _SM01 = 0x00c7 00C8 202 _CP_RL2 = 0x00c8 00C9 203 _C_T2 = 0x00c9 00CA 204 _TR2 = 0x00ca 00CB 205 _EXEN2 = 0x00cb 00CC 206 _TCLK = 0x00cc 00CD 207 _RCLK = 0x00cd 00CE 208 _EXF2 = 0x00ce 00CF 209 _TF2 = 0x00cf 00D0 210 _P = 0x00d0 00D1 211 _FL = 0x00d1 00D2 212 _OV = 0x00d2 00D3 213 _RS0 = 0x00d3 00D4 214 _RS1 = 0x00d4 00D5 215 _F0 = 0x00d5 00D6 216 _AC = 0x00d6 00D7 217 _CY = 0x00d7 00DB 218 _INT6 = 0x00db 00DC 219 _RESI = 0x00dc 00DD 220 _ERESI = 0x00dd 00DF 221 _SMOD1 = 0x00df 00E8 222 _EUSB = 0x00e8 00E9 223 _EI2C = 0x00e9 00EA 224 _EIEX4 = 0x00ea 00EB 225 _EIEX5 = 0x00eb 00EC 226 _EIEX6 = 0x00ec 00F8 227 _PUSB = 0x00f8 00F9 228 _PI2C = 0x00f9 00FA 229 _EIPX4 = 0x00fa 00FB 230 _EIPX5 = 0x00fb 00FC 231 _EIPX6 = 0x00fc 232 ;-------------------------------------------------------- 233 ; overlayable register banks 234 ;-------------------------------------------------------- 235 .area REG_BANK_0 (REL,OVR,DATA) 0000 236 .ds 8 237 ;-------------------------------------------------------- 238 ; internal ram data 239 ;-------------------------------------------------------- 240 .area DSEG (DATA) 0008 241 _timer0_period: 0008 242 .ds 2 000A 243 _timer0_loop_1_1: 000A 244 .ds 2 245 ;-------------------------------------------------------- 246 ; overlayable items in internal ram 247 ;-------------------------------------------------------- 248 .area OSEG (OVR,DATA) 249 ;-------------------------------------------------------- 250 ; indirectly addressable internal ram data 251 ;-------------------------------------------------------- 252 .area ISEG (DATA) 253 ;-------------------------------------------------------- 254 ; bit data 255 ;-------------------------------------------------------- 256 .area BSEG (BIT) 257 ;-------------------------------------------------------- 258 ; paged external ram data 259 ;-------------------------------------------------------- 260 .area PSEG (PAG,XDATA) 261 ;-------------------------------------------------------- 262 ; external ram data 263 ;-------------------------------------------------------- 264 .area XSEG (XDATA) 265 ;-------------------------------------------------------- 266 ; external initialized ram data 267 ;-------------------------------------------------------- 268 .area XISEG (XDATA) 269 .area CSEG (CODE) 270 .area GSINIT0 (CODE) 271 .area GSINIT1 (CODE) 272 .area GSINIT2 (CODE) 273 .area GSINIT3 (CODE) 274 .area GSINIT4 (CODE) 275 .area GSINIT5 (CODE) 276 ;-------------------------------------------------------- 277 ; global & static initialisations 278 ;-------------------------------------------------------- 279 .area CSEG (CODE) 280 .area GSINIT (CODE) 281 .area GSFINAL (CODE) 282 .area GSINIT (CODE) 283 ;------------------------------------------------------------ 284 ;Allocation info for local variables in function 'timer0' 285 ;------------------------------------------------------------ 286 ;loop Allocated with name '_timer0_loop_1_1' 287 ;------------------------------------------------------------ 288 ;timer.c:47: static int loop = 0; 289 ; genAssign 0178 E4 290 clr a 0179 F5 0A 291 mov _timer0_loop_1_1,a 017B F5 0B 292 mov (_timer0_loop_1_1 + 1),a 293 ;-------------------------------------------------------- 294 ; Home 295 ;-------------------------------------------------------- 296 .area HOME (CODE) 297 .area CSEG (CODE) 298 ;-------------------------------------------------------- 299 ; code 300 ;-------------------------------------------------------- 301 .area CSEG (CODE) 302 ;------------------------------------------------------------ 303 ;Allocation info for local variables in function 'timer0_set_counter' 304 ;------------------------------------------------------------ 305 ;------------------------------------------------------------ 306 ;timer.c:14: void timer0_set_counter(void) 307 ; ----------------------------------------- 308 ; function timer0_set_counter 309 ; ----------------------------------------- 0037 310 _timer0_set_counter: 0002 311 ar2 = 0x02 0003 312 ar3 = 0x03 0004 313 ar4 = 0x04 0005 314 ar5 = 0x05 0006 315 ar6 = 0x06 0007 316 ar7 = 0x07 0000 317 ar0 = 0x00 0001 318 ar1 = 0x01 319 ;timer.c:16: TL0 += (timer0_period & 0xFF); 320 ; genAnd 0037 AA 08 321 mov r2,_timer0_period 0039 7B 00 322 mov r3,#0x00 323 ; genCast 324 ; genPlus 325 ; Peephole 236.g used r2 instead of ar2 003B EA 326 mov a,r2 003C 25 8A 327 add a,_TL0 003E F5 8A 328 mov _TL0,a 329 ;timer.c:17: TH0 += (timer0_period >> 8); 330 ; genRightShift 331 ; genRightShiftLiteral 332 ; genrshTwo 0040 AA 09 333 mov r2,(_timer0_period + 1) 0042 7B 00 334 mov r3,#0x00 335 ; genCast 336 ; genPlus 337 ; Peephole 236.g used r2 instead of ar2 0044 EA 338 mov a,r2 0045 25 8C 339 add a,_TH0 0047 F5 8C 340 mov _TH0,a 0049 341 00101$: 0049 22 342 ret 343 ;------------------------------------------------------------ 344 ;Allocation info for local variables in function 'timer0_set_period' 345 ;------------------------------------------------------------ 346 ;period Allocated to registers 347 ;------------------------------------------------------------ 348 ;timer.c:20: void timer0_set_period(u16 period) 349 ; ----------------------------------------- 350 ; function timer0_set_period 351 ; ----------------------------------------- 004A 352 _timer0_set_period: 353 ; genReceive 004A 85 82 08 354 mov _timer0_period,dpl 004D 85 83 09 355 mov (_timer0_period + 1),dph 356 ;timer.c:22: timer0_period = period; 0050 357 00101$: 0050 22 358 ret 359 ;------------------------------------------------------------ 360 ;Allocation info for local variables in function 'timer0_init' 361 ;------------------------------------------------------------ 362 ;------------------------------------------------------------ 363 ;timer.c:25: void timer0_init(void) 364 ; ----------------------------------------- 365 ; function timer0_init 366 ; ----------------------------------------- 0051 367 _timer0_init: 368 ;timer.c:28: TR0 = 0; // Timer0 stop 369 ; genAssign 0051 C2 8C 370 clr _TR0 371 ;timer.c:30: CKCON &= (u8)0xF7; // Timer 0 using CLK 24/12 372 ; genAnd 0053 53 8E F7 373 anl _CKCON,#0xF7 374 ;timer.c:31: TMOD &= (u8)0x0F; // clear Timer 0 mode bits 375 ; genAnd 0056 53 89 0F 376 anl _TMOD,#0x0F 377 ;timer.c:32: TMOD |= (u8)0x01; // Timer0 => 16bit 378 ; genOr 0059 43 89 01 379 orl _TMOD,#0x01 380 ;timer.c:34: TL0 = 0; 381 ; genAssign 005C 75 8A 00 382 mov _TL0,#0x00 383 ;timer.c:35: TH0 = 0; 384 ; genAssign 005F 75 8C 00 385 mov _TH0,#0x00 386 ;timer.c:36: timer0_set_period(0x10000 - 20000); // 24M / 12 / 20000 = 100(Hz) 387 ; genCall 388 ; Peephole 182.b used 16 bit load of dptr 0062 90 B1 E0 389 mov dptr,#0xB1E0 0065 12 00 4A 390 lcall _timer0_set_period 391 ;timer.c:38: timer0_set_counter(); 392 ; genCall 0068 12 00 37 393 lcall _timer0_set_counter 394 ;timer.c:41: ET0 = 1; // enables Timer 0 interrupt 395 ; genAssign 006B D2 A9 396 setb _ET0 397 ;timer.c:42: TR0 = 1; // starts Timer 0 398 ; genAssign 006D D2 8C 399 setb _TR0 006F 400 00101$: 006F 22 401 ret 402 ;------------------------------------------------------------ 403 ;Allocation info for local variables in function 'timer0' 404 ;------------------------------------------------------------ 405 ;loop Allocated with name '_timer0_loop_1_1' 406 ;------------------------------------------------------------ 407 ;timer.c:45: void timer0 (void) interrupt 1 408 ; ----------------------------------------- 409 ; function timer0 410 ; ----------------------------------------- 0070 411 _timer0: 0070 C0 E0 412 push acc 0072 C0 F0 413 push b 0074 C0 82 414 push dpl 0076 C0 83 415 push dph 0078 C0 02 416 push (0+2) 007A C0 03 417 push (0+3) 007C C0 04 418 push (0+4) 007E C0 05 419 push (0+5) 0080 C0 06 420 push (0+6) 0082 C0 07 421 push (0+7) 0084 C0 00 422 push (0+0) 0086 C0 01 423 push (0+1) 0088 C0 D0 424 push psw 008A 75 D0 00 425 mov psw,#0x00 426 ;timer.c:48: TR0 = 0; // stop timer 0 427 ; genAssign 008D C2 8C 428 clr _TR0 429 ;timer.c:49: timer0_set_counter(); 430 ; genCall 008F 12 00 37 431 lcall _timer0_set_counter 432 ;timer.c:50: TR0 = 1; // start timer 0 433 ; genAssign 0092 D2 8C 434 setb _TR0 435 ;timer.c:54: if(++loop == 10){ 436 ; genPlus 437 ; genPlusIncr 0094 05 0A 438 inc _timer0_loop_1_1 0096 E4 439 clr a 0097 B5 0A 02 440 cjne a,_timer0_loop_1_1,00106$ 009A 05 0B 441 inc (_timer0_loop_1_1 + 1) 009C 442 00106$: 443 ; genCmpEq 009C E5 0A 444 mov a,_timer0_loop_1_1 009E B4 0A 04 445 cjne a,#0x0A,00107$ 00A1 E5 0B 446 mov a,(_timer0_loop_1_1 + 1) 447 ; Peephole 162 removed sjmp by inverse jump logic 00A3 60 02 448 jz 00108$ 00A5 449 00107$: 450 ; Peephole 112.b changed ljmp to sjmp 00A5 80 08 451 sjmp 00103$ 00A7 452 00108$: 453 ;timer.c:55: led0_toggle(); 454 ; genCall 00A7 12 00 ED 455 lcall _led0_toggle 456 ;timer.c:56: loop = 0; 457 ; genAssign 00AA E4 458 clr a 00AB F5 0A 459 mov _timer0_loop_1_1,a 00AD F5 0B 460 mov (_timer0_loop_1_1 + 1),a 00AF 461 00103$: 00AF D0 D0 462 pop psw 00B1 D0 01 463 pop (0+1) 00B3 D0 00 464 pop (0+0) 00B5 D0 07 465 pop (0+7) 00B7 D0 06 466 pop (0+6) 00B9 D0 05 467 pop (0+5) 00BB D0 04 468 pop (0+4) 00BD D0 03 469 pop (0+3) 00BF D0 02 470 pop (0+2) 00C1 D0 83 471 pop dph 00C3 D0 82 472 pop dpl 00C5 D0 F0 473 pop b 00C7 D0 E0 474 pop acc 00C9 32 475 reti 476 .area CSEG (CODE) 477 .area XINIT (CODE)