library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
library work;
use work.usefuls.ALL;

entity OverflowTimer is
  generic (
      threshold : integer := 0);
  port (
      clk : in std_logic;
      reset : in std_logic;
      overflow : out std_logic);
end OverflowTimer;

architecture Behavioral of OverflowTimer is
  constant required_bits : integer := min_bits(threshold);
  signal count : std_logic_vector(required_bits-1 downto 0) 
      := (others => '0');
  signal overflow_buf : std_logic := '0';
begin
  process(clk, reset) begin
    if reset = '1' then
      count <= (others => '0');
      overflow_buf <= '0';
    elsif clk'event and clk = '1' then
      if count < conv_std_logic_vector(threshold, required_bits) then
        count <= count + 1;
        overflow_buf <= '0';         
      else
        count <= count;
        overflow_buf <= '1';
      end if;
    end if;
  end process;
  overflow <= overflow_buf;
end Behavioral;