/* loading the generic platform */ var params = {}; params.clockRate = 225.000000; params.deviceName = "6713"; params.catalogName = "ti.catalog.c6000"; params.regs = {}; params.regs.l2Mode = "SRAM"; utils.loadPlatform("ti.platforms.generic", params); /* enabling DSP/BIOS components */ bios.GBL.ENABLEINST = true; bios.MEM.NOMEMORYHEAPS = false; bios.RTDX.ENABLERTDX = true; bios.HST.HOSTLINKTYPE = "RTDX"; bios.TSK.ENABLETSK = true; bios.GBL.ENABLEALLTRC = true; bios.GBL.ENDIANMODE = "little"; bios.GBL.C621XCONFIGUREL2 = false; /* applying user changes */ bios.trace = bios.LOG.create("trace"); bios.LOG_system.bufLen = 0x200; bios.GBL.C621XCONFIGUREL2 = 1; bios.GBL.CALLUSERINITFXN = 1; bios.GBL.USERINITFXN = prog.extern("Sylphide_init"); bios.GBL.CLKOUT = 200.0000; bios.GBL.BOARDNAME = "Sylphide"; bios.GBL.C621XCCFGL2MODE = "4-way cache"; bios.MEM.instance("IRAM").base = 0x00000400; bios.MEM.instance("IRAM").len = 0x0002fc00; bios.MEM.instance("IRAM").createHeap = 1; bios.MEM.instance("IRAM").heapSize = 0x00002000; bios.MEM.create("BOOT"); bios.MEM.instance("BOOT").len = 0x00000400; bios.MEM.instance("BOOT").createHeap = 0; bios.MEM.instance("BOOT").space = "reserved"; bios.MEM.create("SDRAM"); bios.MEM.instance("SDRAM").base = 0x80000000; bios.MEM.instance("SDRAM").len = 0x00800000; bios.MEM.instance("SDRAM").comment = "8M bytes of SDRAM"; bios.MEM.instance("SDRAM").heapSize = 0x00400000; bios.MEM.instance("SDRAM").space = "code/data"; bios.MEM.STACKSIZE = 0x0800; bios.MEM.BIOSOBJSEG = prog.get("IRAM"); bios.MEM.MALLOCSEG = prog.get("SDRAM"); bios.MEM.USERCOMMANDFILE = 0; bios.MEM.TEXTSEG = prog.get("SDRAM"); bios.MEM.SWITCHSEG = prog.get("SDRAM"); bios.MEM.BSSSEG = prog.get("SDRAM"); bios.MEM.FARSEG = prog.get("SDRAM"); bios.MEM.CINITSEG = prog.get("SDRAM"); bios.MEM.PINITSEG = prog.get("SDRAM"); bios.MEM.CONSTSEG = prog.get("SDRAM"); bios.MEM.DATASEG = prog.get("SDRAM"); bios.MEM.CIOSEG = prog.get("SDRAM"); bios.TSK.STACKSEG = prog.get("IRAM"); bios.trace.bufSeg = prog.get("IRAM"); bios.trace.bufLen = 0x20; bios.CACHE_L2.base = 0x30000; bios.TSK.instance("TSK_idle").order = 1; bios.IDL.instance("LNK_dataPump").order = 1; bios.IDL.instance("RTA_dispatcher").order = 2; bios.IDL.instance("IDL_cpuLoad").order = 3; bios.LOG.instance("trace").bufLen = 128; bios.HWI.instance("HWI_INT8").fxn = prog.extern("isr_EDMA"); bios.HWI.instance("HWI_INT8").useDispatcher = 1; bios.HWI.instance("HWI_INT8").interruptMask = "self"; bios.HWI.instance("HWI_INT8").monitor = "Stack Pointer"; bios.HWI.instance("HWI_INT11").fxn = prog.extern("isr_McBSP0_RX"); bios.HWI.instance("HWI_INT11").useDispatcher = 1; //bios.HWI.instance("HWI_INT11").interruptMask = "none"; bios.HWI.instance("HWI_INT11").interruptMask = "bitmask"; // except for self bios.HWI.instance("HWI_INT11").interruptBitMask = 0xf7ff; bios.HWI.instance("HWI_INT11").monitor = "Stack Pointer"; bios.SWI.create("hst_in_ready"); bios.SWI.instance("hst_in_ready").order = 1; bios.SWI.instance("hst_in_ready").mailbox = 1; bios.SWI.instance("hst_in_ready").fxn = prog.extern("isr_HST_log_in"); bios.LOG.instance("trace").dataType = "printf"; bios.LOG.instance("trace").logType = "circular"; bios.LOG.instance("trace").bufLen = 512; bios.LOG.instance("trace").bufSeg = prog.get("IRAM"); //bios.RTDX.BUFSIZE = 2056; bios.RTDX.BUFSIZE = 8200; bios.RTDX.RTDXDATASEG = prog.get("IRAM"); bios.RTDX.MODE = "JTAG"; bios.HST.create("hst_log_in"); bios.HST.instance("hst_log_in").mode = "input"; bios.HST.instance("hst_log_in").frameSize = 8; bios.HST.instance("hst_log_in").numFrames = 8; bios.HST.instance("hst_log_in").notifyFxn = prog.extern("ready_HST_log_in"); bios.HST.instance("hst_log_in").bufSeg = prog.get("SDRAM"); bios.HST.create("hst_log_out"); bios.HST.instance("hst_log_out").mode = "output"; bios.HST.instance("hst_log_out").frameSize = 8; bios.HST.instance("hst_log_out").numFrames = 8; bios.HST.instance("hst_log_out").notifyFxn = prog.extern("isr_HST_log_out"); bios.HST.instance("hst_log_out").bufSeg = prog.get("SDRAM"); bios.RTDX.BUFSIZE = 2056; bios.MBX.create("mbx_MU"); bios.MBX.instance("mbx_MU").messageSize = 80; bios.TSK.instance("TSK_idle").order = 2; bios.TSK.create("tsk_MU"); bios.TSK.instance("tsk_MU").fxn = prog.extern("polling_MU"); bios.TSK.instance("tsk_MU").stackSize = 65536; bios.TSK.instance("tsk_MU").stackMemSeg = prog.get("SDRAM"); bios.TSK.instance("tsk_MU").order = 1; bios.TSK.instance("tsk_MU").priority = 3; bios.TSK.create("tsk_RT"); bios.TSK.instance("tsk_RT").fxn = prog.extern("polling_RX"); bios.TSK.instance("tsk_RT").stackSize = 65536; bios.TSK.instance("tsk_RT").stackMemSeg = prog.get("SDRAM"); bios.TSK.instance("tsk_RT").order = 3; bios.TSK.instance("tsk_RT").priority = 2; // !GRAPHICAL_CONFIG_TOOL_SCRIPT_INSERT_POINT! if (config.hasReportedError == false) { prog.gen(); }